Technical Field
The present document relates to electronic circuits. In particular, the present document relates to gate drive control circuits, method and apparatus in the field of driver circuits preventing cross-conduction between power devices connected in series between power rails, as of e.g. half-bridges.
Background
Series connected power devices between two power rails are used in many applications: switching regulators, Class-D amplifiers, motor drivers etc. Such series connection of power devices/transistors is often referred to as half-bridge configuration.
Power transistors of a half-bridge are respectively driven by two high/low side pre-driver circuits. The pre-driver circuits are typically connected to the control logic circuit that guarantees that each output power device (high or low side) is enabled/switched-on only when the other power device is in guaranteed switched-off state. Time between switching-off one power device and switching-on the other power device is called “dead-time”. Prior art driver and control circuit have commonly a number of limitations that not always guarantee glitch-free and robust operation. In the presence of slow rise/fall edges on the gates of power devices and large propagation delays of pre-driver circuits typical prior art control circuit may miss-trigger one or both pre-driver circuits. Pre-driver miss-triggering may potentially result in destruction of one or both pre-driver circuits.
Conventional prior art gate drive control circuit can come in a situation when the pre-driver propagation delay(rise/fall time of pre-driver, dead-time and due to layout parasitics, level-shifting etc.) and delay of sense feedback loop delay approaches pulse width of incoming modulating signals (PWM) and hence a glitch (double pulse) can be generated.
Solutions are desired to avoid the drawbacks mentioned above.